Apria builds instrumentation for component testing. This project was a feasibility study for a 3.2Gbps pin driver, with adjustable levels and adjustable back termination. The first pass design was targeted on IBM 7WL SiGe. High ESD currents and voltages made the design especially challenging, as the protection diodes must be able to shunt amps of ESD current without becoming leaky or adding significant capacitance, while shielding the SiGe devices from overvoltages and currents.
We had a pretty good design underway, but after using our proposal to wangle a better price out of their existing vendor, Apria's customer stopped the project. I hope to help Apria finish this driver design when a more reliable customer appears.